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The manufacturing is proprietary and has vendor lock-ins with triple NDAs – one for the <b>process development kit</b> (PDK), the technology itself; – one for the Standard Cell Library you can use to synthesize your RTL; – and even another one for the details of all purchase commitments.
Our purpose is a free and open, community based silicon manufacturing process (<a href="https://github.com/libresilicon/process">GitHub link</a>) without any NDAs, a Standard Cell Library (<a href="https://github.com/chipforge/StdCellLib">GitHub link</a>) not only for that process as well as a suitable, refurbished, new-written open source tool chain QtFlow (<a href="https://github.com/leviathanch/qtflow">GitHub link</a>).
During the last couple of months we already developed the first free 1µm process and are now close to manufacturing a first test wafer (<a href="https://github.com/libresilicon/PearlRiver">GitHub link</a>). Even though 1µm does not sounds very ambitious, this process node is still quite well documented in text books, robust and 5 Volt-tolerant.
Once we get a hang on this, the machinery park in the clean room allows us to shrink down to 500nm and less.