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Open CPU / SoC design, all the way up to Debian

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Video duration
00:40:00
Language
English
Abstract
This lecture will cover many aspect of designing a RISC-V CPU, out-of-order execution, multi-core, memory coherency, security and running linux and debian on a FPGA.

This will be based on the recently developped NaxRiscv core, a free and opensource RISC-V softcore. I will cover many interresting aspect of the project/flow to provide a overview of many technical aspect in such project :
- Hardware description languages
- CPU design
- Information leak (spectre)
- Memory coherency
- Linux / Debian requirements
- Debugging / Simulation

Talk ID
11777
Event:
37c3
Day
1
Room
Saal Zuse
Start
noon
Duration
00:40:00
Track
Hardware & Making
Type of
lecture
Speaker
Dolu1990
Other Artists
Talk Slug & media link
37c3-11777-open_cpu_soc_design_all_the_way_up_to_debian
English
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Last revision: 9 months, 3 weeks ago